COMPUTER ORGANIZATION & ARCHITECTURE / 3. COMBINATIONAL CIRCUITS
Combinational Circuits
Adders, multiplexers, decoders — circuits with no memory, output = f(input)
EXPLANATION
Combinational circuits have no memory — output depends ONLY on current inputs. Same inputs always give same outputs. These are the building blocks of the ALU and datapath. Half Adder — adds two 1-bit numbers: - Inputs: A, B - Outputs: Sum = A XOR B, Carry = A AND B - 1+1 = 10 in binary → Sum=0, Carry=1 - Only 2 gates! The foundation of all arithmetic in hardware. Full Adder — adds three 1-bit numbers (A, B, and carry-in): - Inputs: A, B, Cin - Outputs: Sum = A XOR B XOR Cin, Cout = (A AND B) OR (Cin AND (A XOR B)) - Chain full adders together → N-bit ripple carry adder - 4-bit adder = 1 half adder + 3 full adders Ripple Carry Adder (RCA): - Chain N full adders: carry out of each feeds into carry in of next - Simple but slow — carry must "ripple" through all N stages - Delay = N × full_adder_delay (linear in N) - 64-bit RCA has 64 stages of delay — too slow for modern CPUs Carry Look-Ahead Adder (CLA): - Pre-computes carries in parallel using Generate (G=A·B) and Propagate (P=A+B) signals - All carries computed simultaneously — O(log N) delay instead of O(N) - Modern CPUs use this (or carry-select, prefix adders) Multiplexer (MUX) — data selector: - 2:1 MUX: select signal S picks one of 2 inputs (A or B) to pass to output - 4:1 MUX: 2 select bits pick one of 4 inputs - F = S'·A + S·B (for 2:1) - Used EVERYWHERE: choosing between ALU result and memory data, selecting register values, routing signals Demultiplexer (DEMUX): opposite of MUX — routes one input to one of N outputs based on select. Decoder: N inputs → 2^N outputs. Exactly one output is HIGH for each input combination. - 2-to-4 decoder: 2 inputs → 4 outputs (one per minterm) - Used in memory addressing: which RAM cell to read/write Encoder: opposite of decoder. One of 2^N inputs → N-bit binary output. Priority encoder: if multiple inputs high, outputs the highest-priority one. Comparator: compares two N-bit numbers. - Outputs: A>B, A=B, A<B - A=B: all bits equal (use XNOR on each bit, AND all results) - A>B: done bit by bit from MSB, first differing bit determines result
DIAGRAM
HALF ADDER: FULL ADDER:
A ──┬──XOR──→ Sum A ──┬──XOR──┬──XOR──→ Sum
B ──┴──AND──→ Carry B ──┘ │
Cin─────────┴──AND──┐
│ OR──→ Cout
A─AND─B┘
4-BIT RIPPLE CARRY ADDER:
A3 B3 A2 B2 A1 B1 A0 B0
│ │ │ │ │ │ │ │
┌┴──┴┐ ┌┴──┴┐ ┌┴──┴┐ ┌┴──┴┐
│ FA │←│ FA │←│ FA │←│ HA │← Cin=0
└──┬─┘ └──┬─┘ └──┬─┘ └──┬─┘
S3 S2 S1 S0
Carry ripples left → each stage must wait for previous carry
2:1 MULTIPLEXER:
A ──┐
MUX ──→ Output = A if S=0
B ──┘ = B if S=1
↑
S (select)
2-to-4 DECODER:
A1 A0 │ Y3 Y2 Y1 Y0
──────┼─────────────
0 0 │ 0 0 0 1
0 1 │ 0 0 1 0
1 0 │ 0 1 0 0
1 1 │ 1 0 0 0CODE